Tuesday, February 05, 2008

Renesas Technology develops dual-core processors

Renesas Technology Europe today announced the development of the SH7786 group of dual-core processors built around twin SH-4A CPU cores. 

The SH7786 group is intended for high-performance multimedia systems, especially Car Information Systems (CIS) such as car navigation systems.  It incorporates dual Renesas Technology SH-4A high-performance CPU cores to achieve superior processing power of up to 1920 million instructions per second (MIPS)*1 (when operating at 533MHz).

Samples of the first product version, fabricated using a 90nm process, are currently being shipped to selected automotive customers.  The second product version, fabricated using a 65nm process, is under development. The 65nm version, based on the 90nm version, will provide reduced power consumption and an enhanced cost to performance ratio. 

Sample shipments will begin in October 2008 in Japan. The device will be made available to Renesas Technology's wide base of consumer and industrial customers in 2009.

For its two CPU cores the SH7786 group uses the well-established SH-4A, the most powerful CPU core available in the SuperH*2 family of 32-bit RISC*3 microcomputers, and a newly adopted core architecture that supports a dual-core configuration. 

The SH7786 group supports both symmetric multiprocessing (SMP) and asymmetric multiprocessing (AMP)*4 allowing both CPU cores to handle a single processing task using parallel processing for improved efficiency.  This results in a maximum processing performance of 1920MIPS (when operating at 533MHz). 

The SH7786 group can handle the high-speed processing of complex data necessary to meet the requirements of next-generation car navigation systems with functions such as graphical display capabilities, high-quality audio reproduction, and image recognition, while also reducing power consumption.

Another major feature of the SH7786 group is simplified system development of multi-core products.  When developing a multi-core product, separate systems (domains) with different characteristics and functions are allotted to each CPU core, and a distributed function system design is used so the CPU cores can interoperate and function in an integrated manner. 

The SH7786 group employs technologies developed by Renesas Technology that support the building of a distributed function system (communication interface technology for interoperability between the operating systems of multiple domains and technology for preventing interference between these operating systems).  This enables developers to make use of existing software resources designed for single operating systems and makes it possible to build a multi-core distributed function system in a short amount of time.  These technologies also support the running of different operating systems simultaneously with a high level of reliability.

In future Renesas Technology plans to develop additional multi-core products based on this technology, including processors with four CPU cores and dual-core system on chip (SoC) products implementing most of the functions required by car navigation systems, such as image processing.

Product details and features

The SH7786 group integrates dual SH-4A CPU cores on a single chip.  The SH-4A is a 32-bit RISC CPU core consisting of a CPU and FPU that are backward compatible at the instruction set level with SH-1, SH-2, SH-3, and SH-4 microcomputers from Renesas Technology. 

This dual SH-4A CPU cores configuration can be used in a core architecture that supports a dual-core configuration, and the dual cores support both symmetric multiprocessing (SMP) and asymmetric multiprocessing (AMP), providing developers with plenty of flexibility when building systems.

The clock frequency and low-power mode can be set independently for each CPU, making it possible to minimise power consumption while responding to changes in the processing load.

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