Toshiba has announced technical support for its next generation TC320 high-density, low power system-on-chip (SoC) and system-in-package (SiP) custom chips.
Fabricated on a 65nm process, the TC320 Asic family combines a low-k dielectric with up to eight levels of copper and one level of aluminium interconnect.
Analogue and application-specific digital IP cores can be mixed on the same chip, while memory options include embedded DRAM (eDRAM), tightly stacked semi-embedded DRAM, and single- and multi-port SRAM.
Two types of I/O cells support requirements for high pin count and core limited designs respectively.
A range of mixed-signal and digital IP cores include ADCs, DACs, ARM and MIPS processors and options for Ethernet, HDMI, ATA, PCI and USB connectivity.
Packaging options include flip-chip BGA, PBGAs, WCSP (Wafer Level Chip Scale Package) and QFN.
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